A MOSFET as a constituent element of a semiconductor integrated circuit device has been made finer or smaller in accordance with the scaling law of MOSFET. Finer or smaller MOSFET has an improved operation speed. With scaling-down of MOSFET, integration density of MOSFETs can be increased. It is also known that mobility of charge carriers in semiconductor is influenced by stress.
JP-A-2003-86708 reports that in MOSFETs having a channel direction <110> and formed on the surface of a (001) Si plane, a drain current of an NMOS transistor increased with an increase of tensile stress in the channel direction and in the direction perpendicular thereto, whereas a drain current of a PMOS transistor increased with an increase of tensile stress in the direction perpendicular to the channel increased, and reduced with an increase of tensile stress in a direction parallel to the channel. The effect of stress in the channel length direction is larger than the effect of stress in the direction perpendicular to the channel.
JP-A-2006-13322 describes a relation between a drain current and a stress in gate length (channel length), gate width (channel width) and depth directions in an NMOSFET and in a PMOSMET. Driving ability of NMOSFET is improved by a tensile stress in the gate length direction and gate width direction. Driving ability of PMOSFET is improved by a compressive stress in the gate length direction and by a tensile stress in the gate width direction. In the channel length direction, a tensile stress improves the driving ability of NMOSFET and a compressive stress improves the driving ability of PMOSFET. In the channel width (gate width) direction, a tensile stress improves the driving ability of both NMOSFET and PMOSFET.
Isolation between MOSFET's has been realized by a shallow trench isolation (STI) structure. An isolation trench is formed between elements, and an insulating film is buried in the trench. Since a silicon oxide film provides good burying characteristics, silicon oxide is used as burying material. An intrinsic stress of a silicon oxide film is a compressive stress, and the compressive stress becomes high as heat treatment is repeated. Silicon crystal generates compressive strain under the compressive stress of STI.
A compressive stress of STI is a factor for improving the driving ability of PMOSFET in the channel length direction and degrading the driving ability of PMOSFET in the channel width direction and the driving ability of NMOSFET in the channel length direction and in the channel width direction.
Manufacture process for a semiconductor device includes generally a process of forming a MOS transistor structure, covering the MOS transistor structure with an interlayer insulating film, and forming a contact hole through the interlayer insulating film and exposing an electrode region of a MOS transistor. In order to form a contact hole with good controllability, the interlayer insulating film is made of lamination of an etching stopper film and an insulating film formed on the etching stopper film. A silicon nitride film generally providing a tensile stress is used as the etching stopper film. A silicon nitride film providing a compressive stress is also known.
JP-A-2003-86708 proposes to cover an NMOSFET with a film providing a tensile stress and cover a PMOSFET with a film providing a compressive stress. The characteristics of a CMOSFET are improved by applying a tensile stress to a NMOSFET region and a compressive stress to a PMOSFET region.
JP-A-2006-13322 proposes to cover an NMOSFET with a tensile stress film, cover a PMOSFET with a compressive stress film, and release the compressive stress outside the active region in the gate width direction in PMOSFET. By reducing the compressive stress in the gate width direction of PMOSFET, it becomes possible to suppress lowering of a driving ability of PMOSFET.
JP-2008-66484 proposes to cover an NMOSFET with a tensile stress film, cover a PMOSFET with a compressive film, and locate the border between the films nearer to PMOSFET than NMOSFET. By setting the border nearer to PMOSFET, a driving ability is improved.
Together with the miniaturization of transistors, the size (length, width) of the transistor becomes small. The smaller and narrower the length and width of a transistor are, the larger a compressive strain in the channel length and width directions of the channel region applied from the compressive stress of STI is. As miniaturization advances, lowering of the driving ability of transistors becomes an important issue.
In the technology era of 65 nm rules and succeeding eras, such a structure has been adopted in which an NMOSFET is covered with a tensile stress silicon nitride film and a PMOSFET is covered with a compressive silicon nitride film for performance improvement. Usually, a tensile stress silicon nitride film is deposited on NMOSFET, and the tensile stress silicon nitride film is removed from the PMOSFET region. A compressive stress silicon nitride film is deposited, and the compressive stress silicon nitride film is removed from the NMOSFET region to leave only the tensile stress silicon nitride film in the NMOSFET region.